In the drive for commercialization of nanotechnology, new measurement challenges have arisen in characterizing the latest semiconductor devices for generating accurate transistor models, which are the building blocks of next-generation integrated circuits (ICs). Suss MicroTec Systems has announced that the receipt of purchase orders for test equipment will enable the development of these next-generation ICs, including CMOS transistor scaling to the 16-nm node and beyond and investigating the reliability characteristics of high-k dielectrics. As part of a partnership with a global consortium of chipmakers including Sematech, Core Wafer Systems and the College of Nanoscale Science and Engineering (CNSE) of the University at Albany, Suss will install advanced 300-mm wafer-level characterization systems with ProbeShield Technology and a cryogenic probe capability system at CNSE’s Albany NanoTech Complex.