Teramount Raises $50M, Backed by AMD, Samsung, Hitachi
Teramount, a developer of scalable fiber-to-chip interconnect solutions for AI, data centers, and advanced computing, has raised $50 million in a series A round. The funding will allow Teramount to grow its team and scale to volume production, ahead of the market adoption of co-packaged optics (CPO) technology.
Teramount’s "Photonic-Plug" technology uses wafer-level processes for accurate placement of optical elements, thereby shifting accuracy requirements from assembly to the wafer manufacturing domain. Courtesy of Teramount.
Teramount is the developer of the TeraVerse solution, a detachable serviceable connector that links optical fibers coming from outside the rack to the silicon photonics chips inside CPO systems. The company's "Photonic-Plug" technology platform incorporates wafer-level optical elements to enable the company’s patented self-aligning optics technology.
The company has partnered with ecosystem leaders to develop its interconnect solutions, including foundries, silicon and photonics companies, and outsourced assembly and test vendors. GlobalFoundries, ASMPT AMICRA, Tower Semiconductor, and EV Group are among its collaborators.
Koch Disruptive Technologies led the funding round, with participation from existing investors alongside new investors including AMD Ventures, Hitachi Ventures, and Samsung Catalyst Fund.
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