LOS ANGELES, Calif., May 8, 2006 -- Engineers at the UCLA Henry Samueli School of Engineering and Applied Science announced last week that they have made a critical new breakthrough in spin-wave research that could allow semiconductor chips to be made much smaller than traditional CMOS ones while also consuming less power, working more efficiently and costing less.
UCLA engineering adjunct professor Mary Mehrnoosh Eshaghian-Wilner, researcher Alexander Khitun and professor Kang Wang used a technology they pioneered called "spin-wave buses" to create three new nanoscale computational architectures, which they said are not only power efficient, but also possess a high degree of interconnectivity.
"Progress in the miniaturization of semiconductor electronic devices has meant chip features have become nanoscale. Today's current devices, which are based on complementary metal oxide semiconductor standards, or 'CMOS,' can't get much smaller and still function properly and effectively. CMOS continues to face increasing power and cost challenges," Wang said.
In contrast to traditional information processing technology devices that simply move electric charges around while ignoring the extra spin that tags along for the ride, spin-wave buses put the extra motion to work transferring data or power between computer components. Information is encoded directly into the phase of the spin waves. Unlike a point-to-point connection, a "bus" can logically connect several peripherals. The result, the researchers said, is a reduction in power consumption, less heat and, ultimately, the ability to make components much smaller as no physical wires are actually used to send the data.
"Design of nanoscale architectures for computing is a very new area, but an important one for the future. In order to produce effective nanoscale devices, we need to actively look at new low-power designs that can have efficient interconnectivity and allow scaling beyond current barriers," Eshaghian-Wilner said.
The idea of using spin waves for information transmission and processing was first developed under the name "spin-wave buses" by UCLA's Khitun, Wang and graduate researcher Roman Ostroumov. "We've made a significant effort to demonstrate the operation of spin-based devices at room temperature," Khitun said. "Our experimental results confirm the intriguing fact that information can be transmitted via spin waves propagating in spin waveguides — ferromagnetic films."
The work with spin-wave buses recently garnered the trio a 2006 Inventor Recognition Award from the Microelectronics Advanced Research Corp. The corporation funds and operates university-based research centers in microelectronics technology, seeking to expand cooperative, long-range applied microelectronics research at US universities.
According to the research team, the creation and detection of spin-wave packets in nanostructures can be used efficiently to perform massively parallel computational operations, allowing for the design of the first practical, fully interconnected network of processors on a single chip. This breaks with currently proposed spintronic architectures, which rely on a charge transfer simultaneously with spin for information exchange and show significant interconnect problems.
Eshaghian-Wilner, in conjunction with Khitun and Wang, has developed three bus-based designs that use spin waves to achieve the low-power device performance and improved scalability highly desired by industry chip manufacturers.
The first device developed by UCLA engineers, described in a paper presented at the annual ACM International Conference on Computing Frontiers in Ischia, Italy, last week, is a reconfigurable mesh interconnected with spin-wave buses. The architecture of the device requires the same number of switches and buses as standard reconfigurable meshes, but is capable of simultaneously transmitting multiple waves using different frequencies on each of the spin-wave buses — making the parallel architecture capable of very fast and fault-tolerant algorithms. Unlike the traditional spin-based nanostructures that also transmit charge, with this design only waves are transmitted, keeping power consumption extremely low.
"This innovative design represents an original approach for nanoscale computational devices while preserving all of the advantages of wave-based computing," Eshaghian-Wilner said.
The second architecture invention, details of which have been published at the Nano Science and Technology Institute Ninth Annual Nanotechnology Conference and Trade Show — or Nanotech 2006 — being held in Boston this week, is a fully connected cluster of functional units with spin-wave buses. Each node simultaneously broadcasts to all other nodes, and can receive and process multiple data concurrently. The novel design allows all nodes to intercommunicate in constant time. This invention overcomes traditional area restrictions found in current networks.
The researchers also have developed a spin-wave-based crossbar for fully interconnecting multiple inputs to multiple outputs, and plan to announce the full details of the design at the 2006 IEEE Conference on Nanotechnology in Cincinnati, Ohio, in July. As compared to standard molecular crossbar designs, the UCLA research team's is much more fault-tolerant — allowing alternate paths to be reconfigured in case of switch failure. By transmitting waves instead of traditional current charge transmission, the design architecture allows a large reduction in power consumption and provides a high level of interconnectivity between many more paths than currently possible.
"We're tremendously excited about the future of this research," Eshaghian-Wilner said. "The designs demonstrate outstanding performance as interconnects for massively parallel integrated circuits."
"Over the past few years, scientists have studied a variety of methods for designing nanoscale computer architectures. Our collaborative approach using spin-wave buses is a novel one that we hope will lead to additional breakthroughs," Khitun said.
Currently, various extensions and applications of these three designs are being studied and evaluated by the UCLA engineering team and their students. Postgraduate researcher Shiva Navab is proposing techniques for mapping biologically-inspired types of computations on these models for image processing and neural computations. Other application areas being investigated include bioinformatics and implantable biomedical devices. Heterogeneous integrations of these designs in a complementary fashion with other molecular and nanotechnologies also are being developed.
The architectural methods are undergoing implementation and further testing at the UCLA Device Research Laboratories by research scientists Joon Young Lee, who specializes in spin wave-based device processing; and Ming Bao, who carries out the time-resolved inductive voltage measurements aimed at detecting spin waves propagating in 100-nm-thick ferromagnetic films. The Device Research Laboratories nano facilities are led by Wang, director of the Functional Engineered Nano Architectonics Focus Center and the newly developed Western Institute of Nanotechnology, all headquartered at the UCLA Henry Samueli School of Engineering and Applied Science.
For more information, visit: www.engineer.ucla.edu