Researchers at the Paul Scherrer Institute (PSI) have developed a photolithography technique to create denser circuit patterns. The current state-of-the-art microchips have conductive tracks separated by 12 nm. The current work enables tracks with a separation of just 5 nm. In photolithography, a thin slice of silicon known as a wafer is coated with a light-sensitive layer called a photoresist. It is then exposed to a pattern of light corresponding with the blueprint for a microchip, which alters the chemical properties of the photoresist, making it either soluble or insoluble to certain chemical solutions. Subsequent treatment removes the exposed (positive process) or unexposed (negative process) regions. In the end, conductive tracks are left behind on the wafer forming the desired wiring pattern. Researcher Iason Giannopoulos of the Paul Scherrer Institute holds part of the apparatus used to carry out experiments with extreme UV (EUV) lithography at the Swiss Light Source (SLS). Courtesy of Paul Scherrer Institute/Mahir Dzambegovic. Since 2019, manufacturers have been using extreme UV (EUV) light with a wavelength of 13.5 nm in mass production, making it possible to print structures as small as 10 nm and under. During the experiments led by PSI researchers Iason Giannopoulos, Yasin Ekinci, and Dimitrios Kazazis from the Laboratory of X-ray Nanoscience and Technologies, the team used radiation from the Swiss Light Source (SLS) for their investigations, tuned to 13.5 nm in accordance with the industry standard. However, the PSI researchers extended conventional EUV lithography by exposing the sample indirectly rather than directly. In EUV mirror interference lithography (MIL), two mutually coherent beams are reflected onto the wafer by two identical mirrors. The beams then create an interference pattern whose period depends on both the angle of incidence and the wavelength of the light. The group was able to achieve resolutions, i.e. track separations, of 5 nm, in a single exposure. Viewed under an electron microscope, the conductive tracks were found to have high contrast and sharp edges. “Our results show that EUV lithography can produce extremely high resolutions, indicating that there are no fundamental limitations yet,” said Kazazis. “This is really exciting since it extends the horizon of what we deem as possible and can also open up new avenues for research in the field of EUV lithography and photoresist materials.” Despite the possibilities demonstrated by the research, the method is not attractive to industrial chip production due to its slow speed. Additionally, the method can only produce simple and periodic structures, rather than a designed chip. However, the method does provide a route for the early development of photoresists needed for future chip production with a resolution that is not yet possible in the industry. The team plans to continue their research, which will be bolstered by a new EUV tool at the SLS expected by the end of 2025. The new tool, coupled with the updated SLS 2.0, currently undergoing an upgrade, is expected to provide greatly improved performance and capabilities. The research was published in Nanoscale (www.doi.org/10.1039/D4NR01332H).
