Micrometric Photovoltaic Cells Aim To Shrink Electronic Devices
Researchers have manufactured back-contact micrometric photovoltaic cells, a world-first, according to the multi-institutional collaborators. The work paves the way for a new era of miniaturization for electronic devices.
The cells, with a size twice the thickness of a strand of hair, have significant advantages over conventional solar technologies, reducing electrode-induced shadowing by 95% and potentially lowering energy production costs by up to three times.
The micrometric photovoltaic cell manufacturing process involved a partnership between the University of Ottawa, the Université de Sherbrooke in Quebec, and the Laboratoire des Technologies de la Microélectronique in Grenoble, France.
Photo showing the difference between a standard solar cell and a miniaturized solar cell. Courtesy of University of Ottawa.
“These micrometric photovoltaic cells have remarkable characteristics, including an extremely small size and significantly reduced shadowing,” said Karin Hinzer, Ottawa University Research Chair in Photonic Devices for Energy at the Faculty of Engineering. “Those properties lend themselves to various applications, from densification of electronic devices to areas such as solar cells, lightweight nuclear batteries for space exploration, and miniaturization of devices for telecommunications and the internet of things.”
The researchers fabricated 3D interconnects on a multijunction solar cell, leveraging processes including III-V heterostructure plasma etching, gold electrodeposition, and chemical-mechanical polishing. They used wafer-bonding to handle 20-μm-thin III-V films. The strategy enabled the team to demonstrate photonic power devices with areas three orders of magnitude smaller than those with standard chips.
While III-V multijunction solar cells currently hold several efficiency records, they are limited by shading and resistive losses. Micro-scale solar cells have been proposed to alleviate heat dissipation and resistive losses, but the practicality of reducing the size is impeded due to packaging requirements. As the device size is reduced, the ratio of metallized to active area increases, which reduces the power yield per wafer.
The architecture demonstrated by the researchers enabled a large reduction of the metallized areas allowing greater power yield per wafer in microscale solar cells. With the standard architecture, the metallized area can jump from 6% to 68% from device miniaturization. The methods shown by the researchers keep metallized ratios of 2.8% and 0.5% regardless of device size. The current design could increase the wafer use for power generation more than six times for submillimetric solar cells, the researchers said.
The work was funded by the Natural Sciences and Engineering Research Council of Canada, the Fonds de recherche du Québec Nature et technologies, the Horizon Europe Framework program, Prompt Québec, and STACE Inc.
The research was published in
Cell Reports Physical Science (
www.doi.org/10.1016/j.xcrp.2023.101701).
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