The company said that the innovation marks a significant advancement in the capabilities of laser manufacturing in a high-volume CMOS fab, by using the same lithography technology used to manufacture 300-mm silicon wafers with tight process control. The technology ensures consistent wavelength separation of light sources while maintaining uniform output power, which results in meeting a requirement for optical compute interconnect and dense wavelength-division multiplexing (DWDM) communication.
Recent co-packaged optics solutions using DWDM technology have shown the promise of increasing bandwidth while significantly reducing the physical size of photonic chips.
However, it has been very difficult to produce DWDM light sources with uniform wavelength spacing and power, Intel said.
Further, Intel said, the next generation of compute input/output using optical interconnect can be tailor-made for the extreme demands of tomorrow’s high-bandwidth AI and machine learning workloads. The eight-wavelength DFB array was designed and fabricated using Intel’s commercial 300-mm hybrid silicon photonics platform, which is used to manufacture production optical transceivers in volume. Intel used advanced lithography to define the waveguide gratings in silicon prior to the III-V wafer bonding process. The technique resulted in better wavelength uniformity compared to conventional semiconductor lasers manufactured in 3- or 4-in. III-V wafer fabs.
Due to the tight integration of the lasers, the array also maintains its channel spacing when introduced to ambient temperature changes.
The advancement will enable the production of an optical source with the necessary performance for future high-volume applications in co-packaged optics and optical compute interconnect for emerging network-intensive workloads including AI, as well as and machine learning, Intel said.
The laser array is built on Intel’s 300-mm silicon photonics manufacturing process, granting the potential for high-volume manufacturing and broad deployment.
Many aspects of the technology are being implemented by Intel’s Silicon Photonics Products Division as part of a future optical compute interconnect chiplet product. The forthcoming product will offer power-efficient, high-performance multi-terabits per second interconnect between compute resources including CPUs, GPUs, and memory, Intel said.